Closed timothytrippel closed 1 year ago
This seems to be out of date by now since we ended up dealing with this differently. I.e., each software test configure the parts it cares about in the pinmux via the DIF. Likewise, the DV environment has a way of muxing in interfaces in a coarse grained way, basing the pin locations on the primary use case.
It thus feels like this issue can be either closed, or deferred into the backlog if we intend to come back to this again.
@sriyerg @tjaychen WDYT?
Yep this can be closed now I believe. (Feel free to re-open if you feel otherwise though.)
There may be multiple intended use cases of the OpenTitan SoC, each using various (sub)sets of on-chip peripherals. Additionally, there are multiple supported targets for simulating/operating OpenTitan hardware on, each supporting various pinout configurations. We need a mechanism to configure the pinmux module, via its DIFs, based on intended use-case and target (DV and verilator sims, FPGA, and silicon) combinations.
To configure the pinmux for testing all intended use-cases, across all targets we support, we could develop an enhanced interface with the following requirements:
top_{earlgrey,englishbreakfast}.hjson
files.{toplevel}_{pinmux_cfg}_{target}.hjson
sw/device/pinmux_config/configs/
sw/device/lib/testing/
, while other scripting parts may reside inutil/