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lowRISC
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riscv-llvm
RISC-V support for LLVM projects (LLVM, Clang, ...)
http://www.lowrisc.org/llvm/status/
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fix the svn url of llvm
#72
yyyjjp
closed
2 weeks ago
0
DOC: fix comment tag to make the github preview to render correctly
#71
andreamerello
opened
3 years ago
0
How to build lli (LLVM JIT) for RISCV?
#70
Joejiong
opened
3 years ago
1
New rebase?
#69
JL2210
closed
3 years ago
0
Add a new mcpu=C910 in llvm-mc
#68
WilliamWangPeng
closed
4 years ago
0
RISC-V ISA for E mode
#67
WonHoYoo
opened
5 years ago
0
RISC-V patch series as applied on top of r350053 (llvm) & r350028 (clang)
#66
Lichtso
closed
11 months ago
1
riscv64 crashes on global variable access
#65
Lichtso
closed
5 years ago
2
How to add RVE to the LLVM
#64
liang1232018
opened
6 years ago
1
Updates to README.md regarding baremetal.patch
#63
colematt
opened
6 years ago
1
RISCV LLVM benchmark
#62
zejiang0jason
opened
6 years ago
0
file in wrong format
#61
aguilarmg
opened
6 years ago
2
target triple parsing
#60
nburow2
closed
6 years ago
1
Exception handling support
#59
luismarques
opened
6 years ago
4
Debug info is wrong when rustc expects a function to be inlined but llvm doesn't inline it
#58
dvc94ch
opened
6 years ago
1
disassembly printing
#57
ghost
opened
6 years ago
1
state of atomic support
#56
dvc94ch
opened
6 years ago
2
Fixed CodeGen issue with FP64 and function calls
#55
luporl
closed
6 years ago
1
Function calls returning double may generate invalid code
#54
luporl
closed
6 years ago
1
Further investigate performance differences vs riscv-gcc
#53
asb
opened
6 years ago
1
__builtin_flt_rounds() crashes on riscv64
#52
EdSchouten
opened
6 years ago
0
Definition of __(U)INT64_TYPE__ on riscv64 is inconsistent with other targets
#51
EdSchouten
opened
6 years ago
1
Update 04-instruction-printer-and-testing.mkd
#50
cpehle
closed
6 years ago
1
Clang for RISC-V 32/64 bits crashes on __c11_atomic_*_fence() with variable memory order
#49
EdSchouten
opened
6 years ago
0
Release build fails
#48
PkmX
closed
6 years ago
1
Fix some typos in the documentation
#47
glasnak
closed
7 years ago
0
Fix path in build instructions
#46
luismarques
closed
7 years ago
3
Add support for RV32IM without division
#45
luismarques
opened
7 years ago
4
Support TLS
#44
luismarques
opened
7 years ago
4
Ensure proper call frame information metadata is set
#43
asb
opened
7 years ago
10
Make decision on splitting instruction definitions from patterns
#42
asb
closed
7 years ago
2
Implement frame pointer elimination
#41
asb
opened
7 years ago
1
Simplify ABI lowering requirements for frontends
#40
asb
opened
7 years ago
1
Assembler mnemonics spellchecker
#39
asb
opened
7 years ago
0
Improve diagnostics for invalid register names
#38
asb
opened
7 years ago
0
Investigate options for adding support for the GCC torture suite to the LLVM test suite
#37
asb
opened
7 years ago
0
Teach the assembler to recognise standard CSR names
#36
asb
opened
7 years ago
2
Shrinkwrap support
#35
asb
opened
7 years ago
0
Improve code quality for multiplication by a constant
#34
asb
opened
7 years ago
0
Jump table support
#33
asb
opened
7 years ago
0
Support for FDPIC/ROPI/RWPI (PIC on embedded platforms)
#32
asb
opened
7 years ago
0
Support for lowRISC tagged memory
#31
asb
opened
7 years ago
0
Support all RISC-V assembler pseudoinstructions
#30
asb
opened
7 years ago
1
Improve code quality for loads/stores to globals
#29
asb
opened
7 years ago
0
Improve code quality for large stack adjustments
#28
asb
opened
7 years ago
0
Machine scheduling model for at least one core (e.g. Rocket, PULP)
#27
asb
opened
7 years ago
0
Support for PIC, and other code models
#26
asb
opened
7 years ago
0
Implement and test support for all RISC-V inline asm constraints
#25
asb
opened
7 years ago
3
Implement branch analysis
#24
asb
closed
7 years ago
1
RV32E support
#23
asb
opened
7 years ago
0
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