Closed Ajstros closed 1 year ago
Using Endpoint.check_duplicates()
from https://github.com/Ajstros/pyripherals/pull/28
Before:
>>> from pyripherals.core import Endpoint
>>> _ = Endpoint.update_endpoints_from_defines()
>>> dups = Endpoint.check_duplicates()
9 duplicate Endpoints found.
0x3b[None:None]
DDR3/ADDR_DAC_WR
I2CTEST/MESSAGE_1
0x3c[None:None]
DDR3/ADDR_DAC_RD
I2CTEST/MESSAGE_0
0x3d[None:None]
DDR3/ADDR_ADC_WR
FPGATEST/TI_CONFIRM
0x3e[None:None]
DDR3/ADDR_ADC_RD
DDR3/ADC_DATA_CNT
FPGATEST/LOOPED_WO
FPGATEST/LOOPED_WO
0x0[None:None]
ADS8686/REGBRIDGE_OFFSET
GPIO/DEBUG_WIRE_IN
0x3[3:6]
DAC80508/DATA_SEL_LEN
AD5453/DATA_SEL
AD5453/DATA_SEL_LEN
AD5453/DATA_SEL_LEN
0x11[1:2]
DAC80508/FILTER_SEL_LEN
AD5453/FILTER_SEL_LEN
0x0[3:6]
GPIO/CSB_DEBUG_LEN
GPIO/SCLK_DEBUG
GPIO/SCLK_DEBUG_LEN
GPIO/SDI_DEBUG_LEN
GPIO/ADS_CONVST_DEBUG_LEN
GPIO/SCLK_DEBUG_LEN
GPIO/SDI_DEBUG_LEN
GPIO/ADS_CONVST_DEBUG_LEN
GPIO/SDI_DEBUG_LEN
GPIO/ADS_CONVST_DEBUG_LEN
GPIO/ADS_CONVST_DEBUG_LEN
0x1[6:7]
GPIO/UP_WIRE_IN_LEN
GPIO/DOWN_WIRE_IN_LEN
GPIO/3V3_WIRE_IN_LEN
GPIO/3V3_WIRE_IN_LEN
After:
>>> from pyripherals.core import Endpoint
>>> _ = Endpoint.update_endpoints_from_defines()
>>> dups = Endpoint.check_duplicates()
5 duplicate Endpoints found.
0x0[None:None]
ADS8686/REGBRIDGE_OFFSET
GPIO/DEBUG_WIRE_IN
0x3[3:6]
DAC80508/DATA_SEL_LEN
AD5453/DATA_SEL
AD5453/DATA_SEL_LEN
AD5453/DATA_SEL_LEN
0x11[1:2]
DAC80508/FILTER_SEL_LEN
AD5453/FILTER_SEL_LEN
0x0[3:6]
GPIO/CSB_DEBUG_LEN
GPIO/SCLK_DEBUG
GPIO/SCLK_DEBUG_LEN
GPIO/SDI_DEBUG_LEN
GPIO/ADS_CONVST_DEBUG_LEN
GPIO/SCLK_DEBUG_LEN
GPIO/SDI_DEBUG_LEN
GPIO/ADS_CONVST_DEBUG_LEN
GPIO/SDI_DEBUG_LEN
GPIO/ADS_CONVST_DEBUG_LEN
GPIO/ADS_CONVST_DEBUG_LEN
0x1[6:7]
GPIO/UP_WIRE_IN_LEN
GPIO/DOWN_WIRE_IN_LEN
GPIO/3V3_WIRE_IN_LEN
GPIO/3V3_WIRE_IN_LEN
Conflicting addresses in
ep_defines.v
were causing some of the bits in the fpga_test loop back tests to always be set. The conflicting addresses have been moved to open addresses.