LVDS needs to be on clock pin?

lucask07 / covg_fpga

FPGA and Python experiment code for the digital ion channel amplifier project.

GNU General Public License v3.0

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LVDS needs to be on clock pin? #8

Closed lucask07 closed 2 years ago

lucask07 commented 3 years ago

A clock IOB / BUFGMUX clock component pair have been found that are not placed at an optimal clock IOB / BUFGMUX site pair. The clock IOB component is placed at site