luochen1990 / rainbow

Rainbow Parentheses Improved, shorter code, no level limit, smooth and fast, powerful configuration.
Apache License 2.0
1.78k stars 95 forks source link

custom parentheses option with start value of greater then 2 characters #131

Closed pevhall closed 5 years ago

pevhall commented 5 years ago

I'd love to use your plug in for VHDL. Which users mainly text instead of parentheses. I have tried to configure the plugin to do this but I have noticed that when I have "start=for" inside my parentheses option it doesn't work. Upon futher investigation it seems to be related to the number of characters it is searching for. (setting "start=fo" words, start="for" does not. Which is odd since the "step" and "end" values can be more then 2 characters and it works fine just not "start".

Please try the following setup and file. Note: "if"/"else"/"end if " will work. "for" and "end loop" will not.

my vimrc config:

        let g:rainbow_conf = {
      \    'guifgs'  : ['RoyalBlue1', 'SeaGreen3', 'Orange', 'IndianRed', 'Magenta'],
      \    'ctermfgs': ['Blue', 'Cyan', 'Green', 'Red', 'Magenta'] ,
      \    'operators': '_,_',
      \    'separately': {
      \       '*': {},
      \       'vhdl' : {'parentheses': ['start=/(/ end=/)/ fold',  'start=/^\s*if\>/ step=/\<else\>/ end=/\<end if\>/ fold', 'start=/^s*for\>/ end=/\<end loop\>/ fold']},
      \   }
      \ }

Test.vhd file:


  process(clk_i)
    variable word_expected_v : unsigned(WORD_W_g-1 downto 0);
  begin
    if rising_edge(clk_i) then
      s_burst_vld <= '0';
      s_err_we_data_indiv <= (others => '0');
      s_err_op_swithced <= '0';
      wr_test_next <= '0';
      if m_rdy = '1' then
        if m_en_i = '1'  then
          m_first <= m_last_i;

          if m_first = '1' then
            s_burst_we  <= m_we_i;
            s_burst_low <= m_addr_i & to_unsigned(get_lowest_set_bit(m_mask_i), LANE_IDX_W);
          else
            s_err_op_swithced <= to_std_logic(s_burst_we /= m_we_i);
          end if;

          if m_last_i = '1' then
            s_burst_vld  <= '1';
            s_burst_high <=  m_addr_i & to_unsigned(get_highest_set_bit(m_mask_i), LANE_IDX_W);
          end if;

          m_r_vld <= not m_we_i;
          for idx in 0 to LANES_g-1 loop
            word_expected_v := resize(m_addr_i & to_unsigned(idx, LANE_IDX_W), WORD_W_g);
            word_expected_v := word_expected_v + DATA_ADDR_OFFSET_g;
            wr_test_next <= '1';
            if m_we_i = '1' then 
              if m_mask_i(idx) = '1' then
                if m_data_arr(idx) /= word_expected_v then
                  s_err_we_data_indiv(idx) <= '1';
                  -- synthesis translate_off
                  report "write word got "&hstr(m_data_arr(idx))&" expected "&hstr(word_expected_v)
                  severity ERROR;
                  -- synthesis translate_on
                end if;
              end if;
            else
              if m_mask_i(idx) = '1' then
                m_r_data_arr(idx) <= word_expected_v;
              else
                m_r_data_arr(idx) <= (others => '0');
              end if;
            end if;
          end loop;

        end if;
      end if;
      rd_test_next <= '0';

      s_err_w_data <= or_reduce(s_err_we_data_indiv);

      if rst_i = '1' then
        m_first <= '1';
      end if;
    end if;
  end process;
pevhall commented 5 years ago

Sorry Must have had a mistake somewhere ... Came this morning and everything was working great.

Sorry for any inconvenience.