Support for Tang Nano 20K

[michaelnilan]

Is there any plans on extending support to Tang Nano 20K?

[alxkos]

+1

[alxkos]

https://github.com/lushaylabs/lushay-code/blob/main/src/utils/device-info.ts here you can see that 20k is listed. i have installed and looks like its working. will try later

[michaelnilan]

Oh. Noted, Thank you. I will test it too.

[michaelnilan]

Support for 20K is listed. Testing required.

[lushaylabs]

Hi, support for the Tang Nano 20K was added here (constraints editor/project file) before it was added to the open-source toolchain for actually creating the bitstream so I still need to test it there, if I remember correctly it was only tested using the cloud toolchain.

I did see that the new nextpnr himbaechel version and corresponding apicula update do support the Tang Nano 20K, but I don't think they are in OSS-CAD-Suite, I will test it out since if not then it would require manually building nextpnr with the himbaechel flags, maybe I can add settings to easily override versions of specific tools in the open source toolchain to make it easier to work with

[swkim01]

I tested nextpnr himbaechel version on linux, then your counter example worked as good. To build the program which requires python 3.9, I used ubuntu 22.04 linux as a host. At first recent oss-cad-suite (I used 231205 version) was installed, added bin path to .bashrc file. And apycula module have to be installed. $ sudo pip3 install apycula

Then I downloaded the nextpnr source and configured cmake build.

$ git clone https://github.com/YosysHQ/nextpnr
$ cd nextpnr
$ mkdir build; cd build
$ cmake .. -DARCH=himbaechel -DHIMBAECHEL_GOWIN_DEVICES=all -DCMAKE_INSTALL_PREFIX=<oss-cad-suite install dir>

And build and install it into oss-cad-suite.

$ make
$ make install

You create counter example and setup Makefile as follows. THe family name of tangnano20k is GW2AR-18C, but the nextpnr hasn't the family, instead I used GW2A-18C.

BOARD=tangnano20k
FAMILY=GW2A-18C
DEVICE=GW2AR-LV18QN88C8/I7
all: counter.fs

# Synthesis
counter.json: counter.v
        yosys -p "read_verilog counter.v; synth_gowin -top counter -json counter.json"

# Place and Route
counter_pnr.json: counter.json
        nextpnr-himbaechel --json counter.json --freq 27 --write counter_pnr.json --device ${DEVICE} --vopt family=${FAMILY} --vopt cst=${BOARD}.cst

# Generate Bitstream
counter.fs: counter_pnr.json
        gowin_pack -d ${FAMILY} -o counter.fs counter_pnr.json

# Program Board
load: counter.fs
        openFPGALoader -b ${BOARD} counter.fs -f

clean:
        rm counter.fs

.PHONY: load clean
.INTERMEDIATE: counter_pnr.json counter.json

Then build counter_pnr.json by nextpnr-himbaechel. I got next message with no fmax available.

$ make
…
Info: No Fmax available; no interior timing paths found in design.
Info: Checksum: 0x5aafc6c1
Info: Routing globals...

Info: Routing..
Info: Setting up routing queue.
Info: Routing 669 arcs.
Info:            |   (re-)routed arcs  |   delta    | remaining|       time spent     |
Info:    IterCnt |  w/ripup   wo/ripup |  w/r  wo/r |      arcs| batch(sec) total(sec)|
Info:        703 |       16        477 |   16   477 |         0|       2.79       2.79|
Info: Routing complete.
Info: Router1 time 2.79s
Info: Checksum: 0x2eedabbc

Info: No Fmax available; no interior timing paths found in design.

Info: Program finished normally.
gowin_pack -d GW2A-18C -o counter.fs counter_pnr.json
rm counter_pnr.json

Finally the binary code can be downloaded and the leds on board would be blinked. $ make load