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m-j-w / CpuId.jl

Ask the CPU for cache sizes, SIMD feature support, a running hypervisor, and more.
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Precompilation error on the Nvidia Jetson platform #39

Closed coezmaden closed 3 years ago

coezmaden commented 4 years ago

Hi there. I'm trying to run some signal processing code linked to LoopVectorization.jl, in turn linked to VectorizationBase.jl and CpuId.jl. The device I'm using is NVIDIA Jetson AGX Xavier with a 64 bit ARM Processor. Unfortunately the build fails:

(@v1.4) pkg> status
Status `~/.julia/environments/v1.4/Project.toml`
.
.
  [adafc99b] CpuId v0.2.2
.
.
  [bdcacae8] LoopVectorization v0.6.30
.
.

julia> using CpuId
[ Info: Precompiling CpuId [adafc99b-e345-5852-983c-f28acb93d879]
error: couldn't allocate output register for constraint '{ax}'
ERROR: Failed to precompile CpuId [adafc99b-e345-5852-983c-f28acb93d879] to /home/coz/.julia/compiled/v1.4/CpuId/vMZBF_LPpax.ji.
Stacktrace:
 [1] error(::String) at ./error.jl:33
 [2] compilecache(::Base.PkgId, ::String) at ./loading.jl:1272
 [3] _require(::Base.PkgId) at ./loading.jl:1029
 [4] require(::Base.PkgId) at ./loading.jl:927
 [5] require(::Module, ::Symbol) at ./loading.jl:922

I have created an issue with the same title under LoopVectorization.jl https://github.com/chriselrod/LoopVectorization.jl/issues/101 and was hoping to get some advice over here. I would be very glad for any kind of help or support. Thank you.

m-j-w commented 3 years ago

Hey @ozmaden. The main issue is that cpuid is most likely not available or accessible in the same way for NVIDIA Jetson AGX Xavier with a 64 bit ARM Processors as it is for Intel processors.

I'm not sure what to do here apart from advocating to not use CpuId on non-Intel processors?

m-j-w commented 3 years ago

I see you have resolved the issue for LoopVectorization. I close this accordingly. Please complain if this is wrong.

coezmaden commented 3 years ago

Yes, the issue seems to be resolved for LoopVectorization. Thanks!