m-j-w / CpuId.jl

Ask the CPU for cache sizes, SIMD feature support, a running hypervisor, and more.
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Added Project.toml and cacheinlusive. #41

Closed chriselrod closed 3 years ago

chriselrod commented 3 years ago

cacheinclusive indicates whether each cache includes lower cachelevels.

When experimenting with block sizes for matrix multiplication, I realized my Cascadelake CPU (which has a non-inclusive L3) liked to use a much larger % of its L3 than my Haswell (with an inclusive L3). Then again, the Cascadelake also liked to use a larger percentage of its much larger L2 cache as well, and neither of them have inclusive L2 caches.

Figured this would be generally useful for those using cache sizes.

DilumAluthge commented 3 years ago

Bump @m-j-w

giordano commented 3 years ago

I have a PR to add Project.toml in https://github.com/staticfloat/CpuId.jl/pull/1, which targets #40, but I'm not sure @staticfloat ever saw that (not that this repo is super active, either).

Edit: well, I guess I can close https://github.com/staticfloat/CpuId.jl/pull/1

m-j-w commented 3 years ago

Thank you, @chiselrod.