m-labs / artiq

A leading-edge control system for quantum information experiments
https://m-labs.hk/artiq
GNU Lesser General Public License v3.0
430 stars 200 forks source link

Compiler crash when retrieving DMA handle within try-fianlly block #1531

Closed pathfinder49 closed 3 years ago

pathfinder49 commented 4 years ago

Bug Report

One-Line Summary

Attempting to retrieve a DMA handle within a try: ... finally: crashes the compiler.

Issue Details

The experiment below demonstrates the Bug.

from artiq.experiment import *

class Exp(EnvExperiment):
    def build(self):
        self.setattr_device("core")
        self.setattr_device("core_dma")

    @kernel
    def run(self):
        with self.core_dma.record("test0"):
            delay(1e-6)
        try:
            handle = self.core_dma.get_handle("test0")
        finally:
            pass

Attempting to compile this experiment results in:

artiq_compile exp.py
Traceback (most recent call last):
  File "C:\Users\Marius\Anaconda3\envs\artiq-upstream\Scripts\artiq_compile-script.py", line 11, in <module>
    load_entry_point('artiq', 'console_scripts', 'artiq_compile')()
  File "c:\users\marius\scratch\upstream_artiq\artiq\artiq\frontend\artiq_compile.py", line 64, in main
    attribute_writeback=False, print_as_rpc=False)
  File "c:\users\marius\scratch\upstream_artiq\artiq\artiq\coredevice\core.py", line 112, in compile
    library = target.compile_and_link([module])
  File "c:\users\marius\scratch\upstream_artiq\artiq\artiq\compiler\targets.py", line 199, in compile_and_link
    return self.link([self.assemble(self.compile(module)) for module in modules])
  File "c:\users\marius\scratch\upstream_artiq\artiq\artiq\compiler\targets.py", line 199, in <listcomp>
    return self.link([self.assemble(self.compile(module)) for module in modules])
  File "c:\users\marius\scratch\upstream_artiq\artiq\artiq\compiler\targets.py", line 152, in compile
    llmod = module.build_llvm_ir(self)
  File "c:\users\marius\scratch\upstream_artiq\artiq\artiq\compiler\module.py", line 93, in build_llvm_ir
    attribute_writeback=self.attribute_writeback)
  File "c:\users\marius\scratch\upstream_artiq\artiq\artiq\compiler\transforms\llvm_ir_generator.py", line 534, in process
    self.process_function(func)
  File "c:\users\marius\scratch\upstream_artiq\artiq\artiq\compiler\transforms\llvm_ir_generator.py", line 695, in process_function
    llinsn = getattr(self, "process_" + type(insn).__name__)(insn)
  File "c:\users\marius\scratch\upstream_artiq\artiq\artiq\compiler\transforms\llvm_ir_generator.py", line 1493, in process_Invoke
    name=insn.name)
  File "C:\Users\Marius\Anaconda3\envs\artiq-upstream\lib\site-packages\llvmlite_artiq\ir\builder.py", line 814, in invoke
    cconv=cconv)
  File "C:\Users\Marius\Anaconda3\envs\artiq-upstream\lib\site-packages\llvmlite_artiq\ir\instructions.py", line 145, in __init__
    super(InvokeInstr, self).__init__(parent, func, args, name, cconv)
  File "C:\Users\Marius\Anaconda3\envs\artiq-upstream\lib\site-packages\llvmlite_artiq\ir\instructions.py", line 83, in __init__
    raise TypeError(msg)
TypeError: Type of #1 arg mismatch: {i32, i64, i32}* != i8*

Expected Behavior

I know no reason why this shouldn't work. Minimally, there should a sensible error message to aid debugging.

Your System (omit irrelevant parts)

All artiq versions I tested. (latest is a058be2edec1801b58e2e761e317316f450cf72d)

dnadlinger commented 4 years ago

Probably related to #1506.