Rule violation when trying to generate bitstream for qc2

[r-srinivas]

I was trying to generate the bitstream for the release-1 branch (commit 07b41763c20ac7470d723d8e30e937adb0250ac9) and ran into the following error,

ERROR: [DRC 23-20] Rule violation (BIVC-1) Bank IO standard Vcc - Conflicting Vcc voltages in bank 12. For example, the following two ports in this bank have conflicting VCCOs:  
user_sma_gpio_n (LVCMOS25, requiring VCCO=2.500) and dds_d[0] (LVTTL, requiring VCCO=3.300)

This results in an oserror later,

ERROR: [Common 17-39] 'place_design' failed due to earlier errors.

    while executing
"place_design"
    (file "top.tcl" line 99)

That was from vivado.log. On the terminal I see,

ERROR: [Common 17-39] 'place_design' failed due to earlier errors.

    while executing
"place_design"
    (file "top.tcl" line 99)
INFO: [Common 17-206] Exiting Vivado at Wed Jul  6 16:25:06 2016...
Traceback (most recent call last):
  File "/home/rabi/anaconda3/lib/python3.5/runpy.py", line 184, in _run_module_as_main
    "__main__", mod_spec)
  File "/home/rabi/anaconda3/lib/python3.5/runpy.py", line 85, in _run_code
    exec(code, run_globals)
  File "/home/rabi/artiq-dev-1.1/artiq/artiq/gateware/targets/kc705.py", line 408, in <module>
    main()
  File "/home/rabi/artiq-dev-1.1/artiq/artiq/gateware/targets/kc705.py", line 404, in main
    build_artiq_soc(soc, builder_argdict(args))
  File "/home/rabi/artiq-dev-1.1/artiq/artiq/gateware/soc.py", line 61, in build_artiq_soc
    builder.build()
  File "/home/rabi/artiq-dev-1.1/misoc/misoc/integration/builder.py", line 156, in build
    run=self.compile_gateware, **kwargs)
  File "/home/rabi/artiq-dev-1.1/misoc/misoc/integration/soc_core.py", line 195, in build
    self.platform.build(self, *args, **kwargs)
  File "/home/rabi/artiq-dev-1.1/migen/migen/build/xilinx/platform.py", line 28, in build
    return self.toolchain.build(self, *args, **kwargs)
  File "/home/rabi/artiq-dev-1.1/migen/migen/build/xilinx/vivado.py", line 131, in build
    _run_vivado(build_name, toolchain_path, source)
  File "/home/rabi/artiq-dev-1.1/migen/migen/build/xilinx/vivado.py", line 70, in _run_vivado
    raise OSError("Subprocess failed")
OSError: Subprocess failed

How can I fix this? I've attached the vivado.log file if that's useful.

vivado_log.txt

[sbourdeauducq]

This worked on the build server. Is your migen up to date?

[r-srinivas]

I'm pretty sure I had as I had set up that release folder from scratch but I'll check again tomorrow.

On Wed, Jul 6, 2016 at 6:46 PM, Sébastien Bourdeauducq < notifications@github.com> wrote:

This worked on the build server. Is your migen up to date?

— You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub https://github.com/m-labs/artiq/issues/502#issuecomment-230949330, or mute the thread https://github.com/notifications/unsubscribe/AKsxTNJrPaNzAD_I1dYNV6-LOZGMNGDbks5qTExvgaJpZM4JGk9J .

[sbourdeauducq]

It works with the migen release but not with migen master. This commit makes it work with both.

[r-srinivas]

That worked, thanks.