search

m-labs / jesd204b

JESD204B core for Migen/MiSoC
36 stars 11 forks source link

always react to SYNC requests #9

Closed jordens closed 7 years ago

jordens commented 7 years ago

redo link.start so that the core/the link re-enter CGS/ILAS when synchronization is lost (not just the first time after enable)

sbourdeauducq commented 7 years ago

Right now the SYNC signal status is reported outside the JESD core and with a ARTIQ TTL, which is overkill and inappropriate. It would be better to let the JESD core report if a resync has occured (since the last CSR reset) via a CSR that can be reset by the CPU.

jordens commented 7 years ago

That's not my issue here. Right now SYNC drives core.start. It's just that the behavior should be self-healing and not single-shot. Then the CPU can monitor if it wants.

sbourdeauducq commented 7 years ago

I know, but this addition of the CPU monitoring register in the JESD core is certainly best done with this in a single shot.

enjoy-digital commented 7 years ago

The core is now reacting to SYNC requests. The report part is still missing, going to add it before closing.

enjoy-digital commented 7 years ago

We are now able to monitor restarts via https://github.com/m-labs/jesd204b/commit/4af8d970729c991e4f98d122a8a521de6d65495d.