m-labs / migen

A Python toolbox for building complex digital hardware
https://m-labs.hk/migen
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vivado: improve timing during opt_design #253

Closed occheung closed 3 years ago

occheung commented 3 years ago

Summary

Specify the ExploreWithRemap directive while optimizing the logic design in vivado. Below is the description of the related directives in vivado 2021.1 (UG835):

ExploreArea - Run multiple passes of optimization, with an emphasis on reducing area.
ExploreWithRemap - Similar to ExploreArea but adds the remap optimization to compress logic levels.
AddRemap - Run the default optimization, and include LUT remapping to reduce logic levels.