However, when I compile the code, the process gets stuck at this point and nothing else happens.
Info: Placed 134 cells based on constraints.
Info: Creating initial analytic placement for 10573 cells, random placement wirelen = 704316.
Info: at initial placer iter 0, wirelen = 10949
Info: at initial placer iter 1, wirelen = 8071
Info: at initial placer iter 2, wirelen = 7253
Info: at initial placer iter 3, wirelen = 7045
Info: Running main analytical placer.
If I remove the divider the process completes correctly.
What am I doing wrong?
Thank you
Hello,
I am trying to integrate the following frequency divider into my system. The FPGA is an ECP5N lattice.
However, when I compile the code, the process gets stuck at this point and nothing else happens.
If I remove the divider the process completes correctly. What am I doing wrong? Thank you