m-labs / migen

A Python toolbox for building complex digital hardware

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Async FIFO Output is Broken when FIFO Depth is Set to 2 #296

Open linuswck opened 1 day ago

linuswck commented 1 day ago

Description

I found this when I was fixing cdc issue for fast servo port for linien. I used an async fifo for cdc purpose.

Here is where I made the change in fast-servo. https://git.m-labs.hk/M-Labs/nix-servo/commit/87059eef2b7316dbdde7867c134bd843a66f8d85

self.cdc_fifo.sink.stb & self.cdc_fifo.source.ack are always high during operation. https://git.m-labs.hk/M-Labs/nix-servo/src/commit/77643909efdad21f518d9192231188325f7296b2/fast-servo/linien-gateware/cores/dac.py#L52-L55

I connected the fast servo dac output to an oscilloscope and I observed that

Async FIFO Depth = 2: DAC Modulating waveform was periodically broken.
Async FIFO Depth = 4: DAC Modulating waveform looked good.

Related AsyncFIFO Migen Module

https://github.com/m-labs/migen/blob/c19ae9f8ae162ffe2d310a92bfce53ac2a821bc8/migen/genlib/fifo.py#L177-L234