Open troyaws opened 3 years ago
I acknowledge the pin map is described in the image. However, the documentation also contains a tabular form of the pin map for many other components. If someone is trying to figure out what pins are used/available, they're likely to review the pin map (as I did) and not realize the PSRAM is using GPIO16/17. I submitted https://github.com/m5stack/m5-docs/pull/179 to resolve this issue by adding a table for the PSRAM in the pinmap section.
Hello @troyaws
ok, fair enough.
Thanks Felix
The documentation for Core2 for AWS does not detail the PSRAM pin map and the GPIO pins used. This creates confusion for consumers. Please add the details for the PSRAM pins.