This is a place holder for thoughts and ideas for moving forward towards the next level.
Main focus atm is figuring out more flexible ways to add more flexible core / board / IO mux, config options looking at the partial reconfiguration scheme.
I just found out that Altera have updated their longterm realtime kernel to v. 4.1 in their repo:
These are the Fpgamgr kernelfile sources that hav the reconfig stuff added:
This is a place holder for thoughts and ideas for moving forward towards the next level.
Main focus atm is figuring out more flexible ways to add more flexible core / board / IO mux, config options looking at the partial reconfiguration scheme.
I just found out that Altera have updated their longterm realtime kernel to v. 4.1 in their repo:
These are the Fpgamgr kernelfile sources that hav the reconfig stuff added:
https://github.com/altera-opensource/linux-socfpga/blob/socfpga-4.1-ltsi-rt/Documentation/fpga/fpga-mgr.txt#L32
https://github.com/altera-opensource/linux-socfpga/blob/socfpga-4.1-ltsi-rt/include/linux/fpga/fpga-mgr.h#L66
Before that I found a workshop slide that mentions:
https://rocketboards.org/foswiki/pub/Documentation/WS2LinuxKernelIntroductionForAlteraSoCDevices/WS_2_Linux_Kernel_Introduction_Workshop.pdf
http://events.linuxfoundation.org/sites/events/files/slides/FPGAs-under-Linux-Alan-Tull-v1.00.pdf
Booting Altera SoC FPGA from Network using TFTP and NFS
https://github.com/altera-opensource/linux-socfpga/blob/socfpga-4.1-ltsi-rt/Documentation/devicetree/bindings/fpga/fpga-region.txt