Terra Cresta Timings / terrac.cpp

[atrac17]

Clock Information

H-Sync | V-Sync | Source -- | -- | -- 15.625kHz | 59.323592Hz | RT5x/DSLogic +

Crystal Oscillators

Location | Freq (MHz) | Use -- | -- | -- 2 | 16.000 | M68000 X1 | 22.000 | Z80 / YM3526

Pixel clock: 6.00 MHz

Estimated geometry:

383 pixels/line

263 pixels/line

Source - https://github.com/va7deo/TerraCresta

[cuavas]

Measured clocks and estimates aren’t really all that useful. It’s better if you can trace out the divider chain used to generate the signals.

[atrac17]

Okay, well that'll be done when the schematics are finished. I'll close it, you guys can choose not to update the pxl clock and refresh from 8MHz to 6MHz and 60Hz down to 59Hz...

[ajrhacker]

The math doesn't work. You don't get a 6 MHz pixel clock from XTALs marked 22 MHz and 16 MHz.

[atrac17]

The math doesn't work. You don't get a 6 MHz pixel clock from XTALs marked 22 MHz and 16 MHz.

It's 12.000 and a typo. If you look in the repo, there are pictures of the PCB.

[galibert]

Nice. Do you have an LA view of vblank too, and of course the equivalent for hblank/hsync? And for bonus points the position of the start-of-line w.r.t hblank/sync?

OG.