Closed marekjm closed 8 years ago
Proposed syntax: OP.PRED:RI operand...
where OP
is opcode name (e.g. iinc
), PRED
is predicate specification, and RI
is register index used to form the predicate.
Example:
; increase 1 only if 4 is true (pp - positive predicate)
iinc.pp:4 1
The cost of implementing this functionality is too high, given the possible gains. Taking branches is not expensive in Viua, and adding additional complexity in order to avoid branching is not really economical. This could have made sense if the VM supported pipelining, but it doesn't (and there are no plans in the near future to implement such a feature).
Due to above reasons (adding bytecode complexity for no reasonable gains), I'm closing the issue.
Instruction flags could be used to implement predicates, e.g. "execute this instruction only if X is true". This would result in an execution speedup since fewer branches will be required to write equivalent code (this is especially true for one- or two-instruction branches).