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marhel / r68k

A m68k emulator in rust - let r68k = musashi.clone();
MIT License
72 stars 7 forks source link

Scc opcodes #72

Closed emoon closed 8 years ago

emoon commented 8 years ago

New PR ready. I'm doing 6 cycles on true here and 4 on false (which I think is the correct approach)

marhel commented 8 years ago

I think your interpretation of the cycles are correct, and that Musashi is wrong here. I'll take a look at the PR later! Thanks.

marhel commented 8 years ago

Now that I see the cycle table, I think Musashis interpretation is that ST D0 (Scc where cc = true) is 6 cycles, and SF D0 (Scc where cc = false) is 4 cycles, instead of depending on the outcome of the test. I'll check with EASy68k (which runs just fine on OS X under wine, by the way) on their interpretation.

marhel commented 8 years ago

The EASy68k implementation agrees with your interpretation, but for some reason executing SPL D0 say, in the EASy68k simulator, seems to always consume 8 cycles (the opcodes for reg ops are 0x??C? which should AND to 0).

marhel commented 8 years ago

Ok, I think we've found a bug in EASy68k :)

The comparison should read

if ((inst & 0x0030) == 0)

but without the parens, the precedence rules says it'll be interpreted as: 

if (inst & (0x0030 == 0))

which is always false! Nevertheless, I think the intention was to implement it your way :)

emoon commented 8 years ago

That seems wrong. The 68k manual clearly states 6/4 for register and 8+ for memory.

emoon commented 8 years ago

Ah :) Yeah that makes sense. Seems we are finding bugs in our compare implementations quite a bit :)

marhel commented 8 years ago

Indeed, gcc complains "& has lower precedence than ==; == will be evaluated first" when trying to compile a sample to verify this.

marhel commented 8 years ago

And rust has a different precedence, the expected one in this case :+1: so no parens needed.

marhel commented 8 years ago

Reported that bug on the EASy68k forum, it's been a helpful tool so far.