When you use the VREF pin as a regular input or output, you can expect
a reduced performance of toggle rate and tCO because of higher pin
capacitance.
Previously, we had set all HDMI_TX pins to fast output, but doing so
produces some worrying timing violations which were masked over by
relaxation of the SDC constraints. With fast output enabled, actually
fixing the timing constraints would require substantial RTL
optimization.
Instead, by only setting fast output on the VREF pins, I'm able to avoid
the glitching that would occur without any fast output pins when
displaying high clock rate line3x output, while also allowing fitter
enough flexibility to avoid timing violations.
In addition, this commit restores the previously relaxed HDMI_TX timing
constraints to those documented in the IT6613 datasheet.
From the Cyclone IV device handbook:
Previously, we had set all HDMI_TX pins to fast output, but doing so produces some worrying timing violations which were masked over by relaxation of the SDC constraints. With fast output enabled, actually fixing the timing constraints would require substantial RTL optimization.
Instead, by only setting fast output on the VREF pins, I'm able to avoid the glitching that would occur without any fast output pins when displaying high clock rate line3x output, while also allowing fitter enough flexibility to avoid timing violations.
In addition, this commit restores the previously relaxed HDMI_TX timing constraints to those documented in the IT6613 datasheet.