search

marthinwurer / ConnectedRISC

Eventual goal: Watch our own TED talk on our own machine.
0 stars 0 forks source link

VHDL Synthesis #4

Open marthinwurer opened 6 years ago

marthinwurer commented 6 years ago

Get a simple VHDL test synthesizing.

Current thoughts on steps:

  1. Take the lowRISC Nexys4 build system, and make it modular.
  2. Replace the set project file with a script to generate it from a separate config file.
  3. Use that to build a test VHDL file.
marthinwurer commented 6 years ago

Derived from #3