mathis-s / CoreDSL2LLVM

Compiler for generating LLVM ISel Patterns from high-level instruction behavior descriptions
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Could not infer all types in pattern result #15

Open PhilippvK opened 9 months ago

PhilippvK commented 9 months ago

To build llvm with the generated patterns successfully, I need to add explicit type cast for every operand (even GPR:$rs1). Is this expected?

Error:

anonymous_60131:        (add:{ *:[i32] m1:[i32 i64] } GPR:{ *:[i32] m1:[i32 i64] }:$rs2, GPR:{ *:[i32] m1:[i32 i64] }:$rs1)
Included from /tmp/<...>_llvm_demo/llvm/lib/Target/RISCV/RISCV.td:73:
Included from /tmp/<...>_llvm_demo/llvm/lib/Target/RISCV/<...>.td:7:
Included from /tmp/<...>_llvm_demo/llvm/lib/Target/RISCV/<...>/myext_alu.td:4:
/tmp/<...>_llvm_demo/llvm/lib/Target/RISCV/<...>/myext_alu/adds32.td:3:1: error: In anonymous_60131: Could not infer all types in pattern!
def : Pat<

Manual Fix:

diff --git a/llvm/lib/Target/RISCV/<...>/myext_alu/adds32.td b/llvm/lib/Target/RISCV/<...>/myext_alu/adds32.td
index 4c775e5b1c93..a993b2ea707a 100644
--- a/llvm/lib/Target/RISCV/<...>/myext_alu/adds32.td
+++ b/llvm/lib/Target/RISCV/<...>/myext_alu/adds32.td
@@ -1,7 +1,5 @@
 let Predicates = [HasExtmyextalu], hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCodeGenOnly = 1 in def adds32_S_S_S : RVInst_adds32<(outs GPR:$rd), (ins GPR:$rs1, GPR:$rs2)>;

 def : Pat<
-       (add GPR:$rs2, GPR:$rs1),
+       (add (i32 GPR:$rs2), (i32 GPR:$rs1)),
        (adds32_S_S_S GPR:$rs1, GPR:$rs2)>;
PhilippvK commented 9 months ago

Seems like it help to add a single i32 (...) cast around the whole pattern. Did we need this before? @mathis-s