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mattvenn / multi_project_tools

tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
https://www.zerotoasiccourse.com
Apache License 2.0
34 stars 14 forks source link

Short circuit when setting multiple bits of la0? #33

Open urish opened 2 years ago

urish commented 2 years ago

I believe think it might be possible to break the chip by mistakenly setting la0 (active) to 0xFFFFFFFF, thus activating all the designs at once.

Can we protect against this?

mattvenn commented 2 years ago

we could have a little design that sits between the logic analyser and the active lines and makes sure only one line goes high it could also function as the 'what if caravel is broken' module you mentioned #31

but I don't think it's necessary. even if more than one design is turned on, the chip will just draw a bit more power and the line will be in an intermediate state. I don't think we would blow any mosfets. However, this is just a feeling from talking to Tim Edwards about what would happen if multiple designs were driving the logic analyser at the same time. maybe if we turned all the designs on it could damage something.

mattvenn commented 2 years ago

happy to add something to mpw5, but I propose we leave this for mpw4

urish commented 2 years ago

Thanks for the explanation!

What happens before the MGMT SOC starts? is the LA data guaranteed to be all zeroes? Or is there a chance it'll start in an undefined state, thus activating several designs at once, drawing too much power, and preventing the MGMT SOC from starting?