Closed mattvenn closed 2 years ago
Since most of this code is written in python, I think I could start working on this?
I just wanted to ask if by "support different size projects" you mean supporting arbitrary sizes in um^2, passed in projects.yaml, or would a solution where multiple blocks are joined to be above the minimum area would be enough.
Also, this might not be such a great suggestion, but wouldn't it make sense to have this tool generate layout for the bus that connects those cells together? It seems that there is a lot of space wasted between them.
In any case, if you think that I should start working on either of these, I'd be more than happy to provide a design doc and start development on it
Hey, thanks for the offer of helping! The number of pins a macro has determines the minimum size. I also want some standardisation, so we are thinking of some options: wishbone, logic analyser, memory interface, gpio. Then you toggle them on or off and get different minimum sizes.
Re the bus, initially I thought the same, but was talked out of it by the openlane devs. You're right there is a lot of wasted space and I feel we can improve on this.
Why don't you join the next work session with me and Paweł. Check the mpw-preparation channel on the discord.
turn off wishbone and save pins, then can have smaller dies
stack up the projects to make a best fit?