mayl8822 / zynamics

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BinDiff incorrectly maps functions/edges/basic blocks #2

Closed GoogleCodeExporter closed 9 years ago

GoogleCodeExporter commented 9 years ago
What steps will reproduce the problem?
1. Using a custom processor plug-in, load a binary for that architecture. IDA 
disassembles the file properly and produces accurate graphs.
2. Run a BinDiff comparison of the two files
3. View the matching and statistics window. BinDiff has reduced most of the 
functions the 1-2 basic blocks and 3-4 instructions. This is FAR fewer than are 
actually present or shown in the IDA graphs

What is the expected output? What do you see instead?
I would expect the function statistics to match those displayed in the IDA 
graphs. 

What version of the product are you using? On what operating system?
Win7, IDA 6.3, BinDiff 401

Please provide any additional information below.

Original issue reported on code.google.com by john.c.p...@gmail.com on 12 Jul 2012 at 8:44

GoogleCodeExporter commented 9 years ago
Hey John, 

Thank you for the bug report. Could you provide us with the processor module 
and idb file so we can reproduce the error? If that is not possible, please 
check whether the custom CPU module properly sets the flow bit of instructions. 
BinDiff does its own flow analysis and graph reconstruction, independent of 
IDA's results. This is because we treat shared basic blocks differently from 
IDA. Unlike IDA we do not require a function to be a continuous block in memory 
and don't need to append "head" and "tail" blocks to it.

Whenever we encountered an issue like you describe it was due to either the 
instruction's XREFs or flow bits not being set properly. The two should be in 
sync. Do all functions stop on the same (branch?) instruction?

best regards,

    Sören Meyer-Eppler

Original comment by soere...@google.com on 19 Jul 2012 at 9:39

GoogleCodeExporter commented 9 years ago

Original comment by timkor...@google.com on 9 Oct 2012 at 9:54