labodezao commented 4 years ago

Hi ! Thanks a lot for your job !

I get this error with your files :

sudo make BOARD=MCUDEV_DEVEBOX_H7XX_M

CC system_stm32.c In file included from ./mpconfigport.h:31:0, from ../../py/mpconfig.h:62, from ../../py/mphal.h:29, from system_stm32.c:78: system_stm32.c: In function 'SystemClock_Config': boards/MCUDEV_DEVEBOX_H7XX_M/mpconfigboard.h:16:30: error: 'RCC_PLLP_DIV2' undeclared (first use in this function)

define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) // divide PLL clock by this to get core clock

system_stm32.c:295:34: note: in expansion of macro 'MICROPY_HW_CLK_PLLP' RCC_OscInitStruct.PLL.PLLP = MICROPY_HW_CLK_PLLP; ^~~~~~~ boards/MCUDEV_DEVEBOX_H7XX_M/mpconfigboard.h:16:30: note: each undeclared identifier is reported only once for each function it appears in

define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) // divide PLL clock by this to get core clock

system_stm32.c:295:34: note: in expansion of macro 'MICROPY_HW_CLK_PLLP' RCC_OscInitStruct.PLL.PLLP = MICROPY_HW_CLK_PLLP; ^~~~~~~ system_stm32.c:298:34: error: 'MICROPY_HW_CLK_PLLR' undeclared (first use in this function) RCC_OscInitStruct.PLL.PLLR = MICROPY_HW_CLK_PLLR; ^~~~~~~ system_stm32.c:333:38: error: 'MICROPY_HW_CLK_PLL3M' undeclared (first use in this function) PeriphClkInitStruct.PLL3.PLL3M = MICROPY_HW_CLK_PLL3M; ^~~~~~~~ system_stm32.c:334:38: error: 'MICROPY_HW_CLK_PLL3N' undeclared (first use in this function) PeriphClkInitStruct.PLL3.PLL3N = MICROPY_HW_CLK_PLL3N; ^~~~~~~~ system_stm32.c:335:38: error: 'MICROPY_HW_CLK_PLL3P' undeclared (first use in this function) PeriphClkInitStruct.PLL3.PLL3P = MICROPY_HW_CLK_PLL3P; ^~~~~~~~ system_stm32.c:336:38: error: 'MICROPY_HW_CLK_PLL3Q' undeclared (first use in this function) PeriphClkInitStruct.PLL3.PLL3Q = MICROPY_HW_CLK_PLL3Q; ^~~~~~~~ system_stm32.c:337:38: error: 'MICROPY_HW_CLK_PLL3R' undeclared (first use in this function) PeriphClkInitStruct.PLL3.PLL3R = MICROPY_HW_CLK_PLL3R; ^~~~~~~~ ../../py/mkrules.mk:47: recipe for target 'build-MCUDEV_DEVEBOX_H7XX_M/system_stm32.o' failed make: *** [build-MCUDEV_DEVEBOX_H7XX_M/system_stm32.o] Error 1

This seems to be linked to the mcuboard definition file, but I don't understand anything :)

Do you have any idea to solve this ?

Best regards !

jcw commented 4 years ago

The following changes to mpconfigboard.h appear to work:

// HSE is 25MHz
#define MICROPY_HW_CLK_PLLM (25) // divide external clock by this to get 1MHz
#define MICROPY_HW_CLK_PLLN (400) // PLL clock in MHz
#define MICROPY_HW_CLK_PLLP (1) // divide PLL clock by this to get core clock
#define MICROPY_HW_CLK_PLLQ (2) // ...
#define MICROPY_HW_CLK_PLLR (1) // ...

#define MICROPY_HW_CLK_PLL3M (25) // divide external clock by this to get 1MHz
#define MICROPY_HW_CLK_PLL3N (240) // PLL clock in MHz
#define MICROPY_HW_CLK_PLL3P (2) // divide PLL clock by this to get core clock
#define MICROPY_HW_CLK_PLL3Q (5) // divide core clock by this to get 48MHz
#define MICROPY_HW_CLK_PLL3R (2) // ...

After upload, I get:

MicroPython v1.12-659-g441460d81 on 2020-07-26; MCUDEV DEVEBOX STM32H7XX_M with STM32H7XX
Type "help()" for more information.
>>> import machine
>>> machine.freq()
(400000000, 200000000, 100000000, 100000000)
>>>

I'm not 100% convinced this is correct, as it appears that this is running the VCO in wide-range mode, which goes from 2..16 MHz, whereas the divider defined above feeds it with 1 MHz (other values would need changes in µPy code). So maybe it's running out of spec, but this does make the CPU run at 400 MHz, and USB also works.

Pinnchus commented 4 years ago

I slightly change your Clock definitions, to this, according with https://github.com/micropython/micropython/blob/master/ports/stm32/boards/NUCLEO_H743ZI/mpconfigboard.h

define MICROPY_HW_CLK_PLLM (5) // divide external clock by this to get 5MHz

define MICROPY_HW_CLK_PLLN (192) // PLL clock in MHz

define MICROPY_HW_CLK_PLLP (2) // divide PLL clock by this to get core clock 480Mhz

define MICROPY_HW_CLK_PLLQ (2) // ...

define MICROPY_HW_CLK_PLLR (2) // ...

define MICROPY_HW_CLK_PLL3M (5) // divide external clock by this to get 5MHz

define MICROPY_HW_CLK_PLL3N (48) // PLL clock in MHz

define MICROPY_HW_CLK_PLL3P (2) // divide PLL clock by this to get core clock

define MICROPY_HW_CLK_PLL3Q (5) // divide core clock by this to get 48MHz

define MICROPY_HW_CLK_PLL3R (2)

whatcall commented 4 years ago

Save issue. Please apply the proper patch from proposals above.

eurol commented 3 years ago

define MICROPY_HW_CLK_PLLP (2) // divide PLL clock by this to get core clock 480Mhz

480MHz is supported if the chip revision is V. In case of revision "Y" maximum clock is 400MHz (errata: https://www.st.com/resource/en/errata_sheet/dm00399555-stm32h750xb-and-stm32h753xi-device-limitations-stmicroelectronics.pdf, 2.2.20 at page 16).

jcw commented 3 years ago

480MHz is supported if the chip revision is V

Yup. And if you just want the highest achievable clock, this can be automated - see my example here:

https://git.jeelabs.org/jcw/jeeh/src/branch/master/arch/stm32.cpp#L110-L116

mcauser / MCUDEV_DEVEBOX_H7XX_M

Error while compiling #1

define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) // divide PLL clock by this to get core clock

define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2) // divide PLL clock by this to get core clock

define MICROPY_HW_CLK_PLLM (5) // divide external clock by this to get 5MHz

define MICROPY_HW_CLK_PLLN (192) // PLL clock in MHz

define MICROPY_HW_CLK_PLLP (2) // divide PLL clock by this to get core clock 480Mhz

define MICROPY_HW_CLK_PLLQ (2) // ...

define MICROPY_HW_CLK_PLLR (2) // ...

define MICROPY_HW_CLK_PLL3M (5) // divide external clock by this to get 5MHz

define MICROPY_HW_CLK_PLL3N (48) // PLL clock in MHz

define MICROPY_HW_CLK_PLL3P (2) // divide PLL clock by this to get core clock

define MICROPY_HW_CLK_PLL3Q (5) // divide core clock by this to get 48MHz

define MICROPY_HW_CLK_PLL3R (2)

define MICROPY_HW_CLK_PLLP (2) // divide PLL clock by this to get core clock 480Mhz