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mfld-fr / emu86

Intel IA16 emulator for embedded development
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Add opcodes of R8810 #2

Open mfld-fr opened 8 years ago

mfld-fr commented 8 years ago

R8810 is an Intel 80188 clone by RDC.

mfld-fr commented 3 years ago

@cocus added ENTER, LEAVE and PUSH imm16 in #28

mfld-fr commented 3 years ago

@cocus improved XLAT in #29

mfld-fr commented 3 years ago

@cocus added AAM and AAD in #61

cocus commented 3 years ago

I've summarized the missing opcodes based of the NULL handlers found on the op-exec.c file:

I haven't included the ones marked as "hole" since I wasn't sure if these are already handled or not. Please validate if I've missed something or not. Thanks!

mfld-fr commented 3 years ago
cocus commented 3 years ago

@mfld-fr : Assuming we don't want to emulate an FPU for the time being, an 80x86 that doesn't have an attached FPU, will only execute nops when an ESC sequence is found. It's assuming that the FPU will do whatever it's needed to execute the FPU instruction which might or not modify the memory. As far as I could understand yesterday when checking what were these ESC codes, programs usually check for the existence of the FPU by initializing it (fninit) and storing the status word on a memory location (FNSTSW [memory]) that was pre-set with a known value. If the FPU is not present, that memory location would keep its pre-set value, but if the FPU exists, then that memory would get the FPU status word.

Source: https://retrocomputing.stackexchange.com/questions/16529/detecting-the-external-x87-fpu

mfld-fr commented 3 years ago

So you want to execute a NOP when decoding an ESC, to allow any FPU detection code to find out there is actually not FPU, in place of stopping the emulator as today ? That's make sense, but I would add a warning like 'ESC without FPU'.

cocus commented 3 years ago

@mfld-fr : Yes, that's the goal for implementing ESC sequences as of now. I'll create a PR later today with a draft that I have, which at least fools some pre-compiled applications into thinking that there's no FPU.

mfld-fr commented 3 years ago

But from what I read in the 80C186 / 80C188 datasheet, FPU interface is not supported, and the CPU would generate the INT 07h for all the ESC opcodes, whatever the 'trap bit' in the opcode.

cocus commented 3 years ago

Yes, that is correct. image I think this behavior is 80C18x dependent, and not 80x86 related.

mfld-fr commented 3 years ago

So it means we would need an option (in config.mk ?) to tell EMU86 we want to emulate the 8086/8088 behavior or the 80186/80188 one... this option is also needed for issue #4 by the way.

cocus commented 3 years ago

Yes, you're correct. How would you like to proceed? I think having that option in config.mk would make sense. Then, (and even if I don't fully like it), we should be able to add some ifdefs to change the behavior on the op-exec. What do you think?

mfld-fr commented 3 years ago

Yes, let us add an option in config.mk. Because of #4, I am afraid the #ifdef / #endif that you don't like are the simplest way to select the expected behavior, not only in op-exec, but also in op-class, because of some differences in decoding too.

cocus commented 3 years ago

That's perfectly fine, I usually dislike these because it's difficult to read code that's plagued with #ifdef / #else / #endif. But I think it should be fine in this case.

ghaerr commented 3 years ago

My input to this discussion is that, of course, few #ifdef's or best none, but hopefully the default option is one where users of MSDOS/FreeDOS or associated user programs that use ESC to determine whether FPU is present do not have to research or set a config option to use EMU86. I kind of like the idea of ESC executing NOPs but a warning 'ESC without FPU'.

mfld-fr commented 2 years ago

Three operands IMUL decoding added in #81

mfld-fr commented 7 months ago

Three operands IMUL implemented in 48b0d8a by @robots