Closed deinonychus closed 11 years ago
michaelcmartin
commented
11 years ago This is now in as of commit e5ac21f0f93ec6625e3150ad892a4137a0130d1e but I don't have access to an actual chip that understands these instructions; I had to speculate a little for how relative offsets were computed. If you have a system you can test code against, it would be great if you could verify this before I closed the issue.
deinonychus
commented
11 years ago OK, I'll have a look and check it out with my AIM65 SBC equipped with
a Rockwel R65C02.
Thank you!
On Jan 28, 2013, at 5:23 AM, Michael C. Martin wrote:
This is now in as of commit e5ac21f but I don't have access to an
actual chip that understands these instructions; I had to speculate
a little for how relative offsets were computed. If you have a
system you can test code against, it would be great if you could
verify this before I closed the issue.— Reply to this email directly or view it on GitHub.
deinonychus
commented
11 years ago Hi Michael!
Sorry that it took me awhile, but I eventually verified the additional instruction of the new version with the 65C02 on my AIM65 SBC.
--> And it works OK!
Thank you for implementing it!
I may post a message on the 6502.org forum about the new feature.
Best regards,
On Jan 28, 2013, at 5:23 AM, Michael C. Martin wrote:
This is now in as of commit e5ac21f but I don't have access to an actual chip that understands these instructions; I had to speculate a little for how relative offsets were computed. If you have a system you can test code against, it would be great if you could verify this before I closed the issue.
— Reply to this email directly or view it on GitHub.
Bug regarding the BBRx/BBSx opcodes.
For those sixteen opcodes you assume the addressing mode "relative" just like the regular 6502 branch instructions. But it should rather be "zeropage, relative" mode as this is a new mode introduced by the Rockwell 65C02, so it's a three byte command taking two arguments.