michaelgale / pcbflow

Python based Printed Circuit Board (PCB) layout and design package based on CuFlow.
BSD 3-Clause "New" or "Revised" License
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Outer Limits #1

Closed zignig closed 3 years ago

zignig commented 3 years ago

I think that this should have a skidl interface. basic rectangle packer with margins for rivers. Then add nmigen for a logic solver.

michaelgale commented 3 years ago

I was thinking about integration with skidl--it seems like a logical mashup. However, it would be a non-trivial amount of work. Taking this experiment into a full EDA tool with netlist consistency between "schematic" and PCB would like need a clean sheet redesign. I view this tool as a convenient way of making trivial/quickie PCBs--things like breakout boards, test jigs, simple MCUs, etc.--without requiring the use of a full EDA tool. I also see how a single python script can also generate mechanical assets (like a enclosure) using CadQuery and the PCB using pcbflow. I guess that's where I'm coming from with this experiment--to see if I can generate simple items which include a PCB, using pure python scripting.

zignig commented 3 years ago

good work so far ;) , I think a general clever solver to start ( http://alumni.media.mit.edu/~jorkin/goap.html ) and then a specific cortex ( https://en.wikipedia.org/wiki/Neuroevolution_of_augmenting_topologies ) to solve internal kinks.

make a archetypal first an then specify.

zignig commented 3 years ago

@jamesbowman @xesscorp how about it?

jamesbowman commented 3 years ago

I'm tending to agree with @michaelgale -- for example these boards, which do have arbitrary hookups, yet still have no routing.

https://tinyletter.com/jamesbowman/letters/crossbars-in-cuflow

image

A next stepping stone would be a top-level script that specified 2 components (e.g. an MCU and a header), their connections, and it would generate everything from that.

xesscorp commented 3 years ago

I know a bit about CuFlow, but not the details about how to actually specify a layout. I assume pcbflow is some framework around that which adds functionality, although I don't know what. I can see SKiDL used for generating part/net connectivity, but not how easy/hard that would be to integrate into CuFlow. nmigen is used for designing digital systems, typically for FPGAs, but how does that relate to the PCB design? Does the board routing flow back to the I/O pin assignments? Then there's evolutionary generative design and multi-agents which I have no idea what their involvement is. Some kind of optimization?

Is there a description of what such a system would do and how it would be used? What are the inputs from the designer and what are the outputs from the system? I'm lost.

michaelgale commented 3 years ago

@xesscorp I think @zignig is simply looking at blue-sky possibilities for a python based EDA system which combine strengths from several projects. As it applies to PCB design, the use of optimization algorithms/AI techniques has been a holy-grail of EDA tools for as long as I can remember!

My goals for pcbflow are very modest. I have taken @jamesbowman 's CuFlow and have modularized and extended it, with the goal to make it more general purpose and accessible. As I dig under the hood of CuFlow/pcbflow, I recognize that there is a basic representation of nets and physical pin/pad assignments; however, it is not strictly enforced, or even necessary to specify for the purposes of making a simple PCB. However, skidl's mature, robust, and general purpose framework for capturing circuit design/nets/component attributes etc. is VERY tempting to integrate with pcbflow. I can imagine the following workflow:

  1. Use skidl's semantics to add components and make net connections
  2. Adapt pcbflow to natively use a skidl object as its data source.
  3. pcbflow is used to define the physical attributes of the PCB (size, layer-stack, annotations, logos, holes, cutouts, design rules, etc.)
  4. Users place available skidl components physically on the PCB (location, orientation, etc.)
  5. Users can optionally assign global network fills to any layers or polygon "patches" (e.g. GND on layer 2, etc.)
  6. Users then describe routing actions to connect nets, e.g. fanout to vias tied to plane layers, turtle style point to point routing of single nets or entire "bus/river" wide nets, and eventually semi/fully-automated routing tools (if developed)
  7. Finally, pcbflow can export whatever design assets are required, e.g. SVG previews, Gerbers for fab, etc.
xesscorp commented 3 years ago

OK, I understand.

You might want to look at this KiCon 2019 talk about programmatic creation of PCBs. It's done with C# but it may have some ideas you could use.

michaelgale commented 3 years ago

@xesscorp Cool! Thanks for the link--I'm sure there's some good nuggets of wisdom in there. If anything it will be interesting to hear about how other folks attempt to solve the same problems.

FYI, I'm digging into skidl to understand how it works and how it might be adapted to feed scripted PCB generation. Kudos for making such a clever and useful tool and nicely documented code!

xesscorp commented 3 years ago

Thank you!

Let me know if there are SKiDL modifications you would find useful. I can make a separate branch for any pcbflow-specific modifications.

zignig commented 3 years ago

Blue sky is exactly right, I've wanted to make a declarative system that will ask for solutions if it can't find one. Skidl, kicad, cadquery, cqparts, nmigen etc.... with a single front end. Anyway.. carry on.

xesscorp commented 3 years ago

I wasn't aware of cadquery/cqparts. Looks interesting.

On the nmigen end of the design spectrum, you might want to look at pymtl. Then there's jitx which is a commercial offering that sits somewhere near SKiDL.

Weaving all these pieces together to do generalized electronic/mechanical design seems "challenging".

zignig commented 3 years ago

I'm not sure if this is a thing. But sleep deprivation is cheap.

I did not expect to get any answers from the internet awesome.

I would like to make a python interface that takes a keyword tree and attempts to build a physibal.

declare a struct

::box ::pcb 48V:: -> 5v

AND the system builds a thing/

I should probably start a new repo.

zignig commented 3 years ago

As much as this is awseome,We are going to start a new thread. https://github.com/zignig/artifex/issues/1 . WE need a declarative interface for all things physible.

michaelgale commented 3 years ago

Closing this issue since discussion has now moved to @zignig / artifex