Implement compiler agnostic u128 and s128 div{u} and rem{u}

[michaeljclark]

• compiler agnostic u128 and s128 multiply are implemented defined using constant time 64-bit {add,shift,and}
• compiler agnostic u128 and s128 divide needs to be implemented (using 64-bit bitwise division)

[michaeljclark]

Added all bitwise logical ops, add, sub, shift, mul and div operators here:

https://github.com/michaeljclark/riscv-meta/blob/master/src/asm/riscv-operators.h

Need to test operators once the RV128I opcodes have been defined.

Signed division may still remain to be implemented.