micro-FPGA / riscv-contest-2018

RISCV SoftCPU Contest 2018
Apache License 2.0
14 stars 4 forks source link

Is floor planning allowed ? #11

Closed Dolu1990 closed 6 years ago

Dolu1990 commented 6 years ago

This also include verilog attributs to set the cells position.

AnttiLukats commented 6 years ago

Yes, if you can make it repeatable by some means, even you write down step by step instructions to fiddle around in the GUI :) you do not need to provide a command line script to run the FPGA flow.

AnttiLukats commented 6 years ago

I see there are floorplanner files in Libero, so assuming you describe it properly yes. floorplanning OK