The Visual Studio MI Debug Engine ("MIEngine") provides an open-source Visual Studio Debugger extension that works with MI-enabled debuggers such as gdb and lldb.
MIT License
818
stars
218
forks
source link
MIEngine: Fix Disassembly fail on GPU if startAddress is offset #1420
Fix Disassembly failure on GPU if startAddress is offset
Issue description & fix:
When opening Disassembly View, VS requests disassembly for a certain amount of instructions.
In some of those requests, start address calculation results in an address in the middle of the instruction.
GDB is unable to execute the command if the start address of the disassembly range is the middle of the instruction - returns "unknown error -1", and thus MIEngine does not have any data for the VS to populate the entries - as a result, nulls are returned to VS, represented by "??".
The fix is to loop the disassembly request if it fails while decrementing the start address - this way at some point it will align with the beginning of the instruction. The loop will perform at most Process.MaxInstructionSize-times (assuming worst-case initial address at the end of the instruction).
It does happen that the end address is offset as well, but it does not affect the disassembly process.
Fix Disassembly failure on GPU if startAddress is offset
Issue description & fix: When opening Disassembly View, VS requests disassembly for a certain amount of instructions. In some of those requests, start address calculation results in an address in the middle of the instruction. GDB is unable to execute the command if the start address of the disassembly range is the middle of the instruction - returns "unknown error -1", and thus MIEngine does not have any data for the VS to populate the entries - as a result, nulls are returned to VS, represented by "??". The fix is to loop the disassembly request if it fails while decrementing the start address - this way at some point it will align with the beginning of the instruction. The loop will perform at most Process.MaxInstructionSize-times (assuming worst-case initial address at the end of the instruction).
It does happen that the end address is offset as well, but it does not affect the disassembly process.
Signed-off-by: intel-rganesh rakesh.ganesh@intel.com