mirage / shared-memory-ring

Xen-style shared memory rings
ISC License
20 stars 12 forks source link

fails on ARM Jenkins #2

Closed avsm closed 11 years ago

avsm commented 11 years ago

(predictably enough, just recording this for now as it prevents mirage from compiling on ARM at all)

pkg_lwt_unix: ........................................ /home/avsm/.opam/4.01.0dev+trunk/lib/lwt
pkg_ounit: ........................................... /home/avsm/.opam/4.01.0dev+trunk/lib/oUnit

/home/avsm/.opam/4.01.0dev+trunk/bin/ocamlopt.opt -I /home/avsm/.opam/4.01.0dev+trunk/lib/ocaml/ocamlbuild unix.cmxa /home/avsm/.opam/4.01.0dev+trunk/lib/ocaml/ocamlbuild/ocamlbuildlib.cmxa myocamlbuild.ml /home/avsm/.opam/4.01.0dev+trunk/lib/ocaml/ocamlbuild/ocamlbuild.cmx -o myocamlbuild
ocamlfind ocamlc -c lib/barrier_stubs.c
+ ocamlfind ocamlc -c lib/barrier_stubs.c
/tmp/ccoSxMJ6.s: Assembler messages:
/tmp/ccoSxMJ6.s:25: Error: bad instruction `mfence'
/tmp/ccoSxMJ6.s:45: Error: bad instruction `sfence'
Command exited with code 2.
djs55 commented 11 years ago

I believe this has been fixed since

commit fa08a5b6f3b29749878195ad658610e443030221
Author: David Scott <dave.scott@eu.citrix.com>
Date:   Fri Feb 22 13:43:08 2013 +0000

Add support for memory barriers on ARM; use the same semantics as the C xens

To support ARM we need to have an ARM #ifdef in barrier.h

To match the C sementics we need to use the xen_mb () barrier twice
in xenstore read/write rather than using a xen_wmb ().