tanner-andrulis
commented
1 week ago My understanding is that for eDRAM with a set retention time & refresh period, the critical consideration would be the power spent on refreshing devices (please correct me if this understanding is incorrect).
To account for this in CiMLoop, you can create a primitive or compound component (tutorial here https://github.com/Accelergy-Project/timeloop-accelergy-exercises) that uses these parameters to calculate the power spent on refresh. I would put this power in the "leak" action for the component. If you'd like to power-gate unused cells (i.e., if you don't use a particular eDRAM row, don't refresh it), then you can use the has_power_gating attribute as described in https://timeloop.csail.mit.edu/v4/input-formats/design/architecture
I am writing to ask about the possibility of using CiMLoop to simulate DRAM/eDRAM with specific parameters such as retention time and refresh period. It appears that these parameters are not currently included in the memory cells YAML files. Could you please advise me on how or where I might add such parameters to CiMLoop? Thank you very much for your assistance.