aes128 is missing rst port and one_round is not created properly.

[Lucaz97]

I was having trouble simulating aes128 and thought it was a problem on my testbench. I got this warnings from vcs:

Warning-[TFIPC] Too few instance port connections ../hdl_orig/aes_128.v, 75 aes_128, "one_round r9(clk, s8, k8b, s9);" The above instance has fewer port connections than the module definition. Please use '+lint=TFIPC-L' to print out detailed information of unconnected ports.

Warning-[TFIPC] Too few instance port connections ../hdl_orig/aes_128.v, 78 aes_128, "final_round rf(clk, s9, k9b, out);" The above instance has fewer port connections than the module definition. Please use '+lint=TFIPC-L' to print out detailed information of unconnected ports.

Warning-[PCWM-W] Port connection width mismatch ../hdl_orig/aes_128.v, 68 "one_round r2(clk, s1, k1b, s2, );" The following 128-bit expression is connected to 1-bit port "rst" of module "one_round", instance "r2". Expression: s1 Instantiated module defined at: "../hdl_orig/round.v", 20 Use +lint=PCWM for more details.

Checking the source code I found:

Checking aes192 it has a rst signal in its ports and is correctly propagated. I think the same should be done in the aes128 module. If you want I can make a pull request.

[bchetwynd]

Luca,

Thank you for the catch. We'll roll it into our next release, but for now I suggest making the change you cite.

[Lucaz97]

Ok thank you!

[bchetwynd]

Fix should be in the v3.1 release.