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mit-ll / CEP

The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely available components.
BSD 2-Clause "Simplified" License
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Status of CEP migration #14

Closed arlted closed 2 years ago

arlted commented 2 years ago

Hi, I read a comment in another thread that a more up-to-date CEP will be migrating to UCB'sChip Yard. Is there a time frame when the migration could happen? I am interested in using the most-up-to-date CEP design and silumation environment for a project that involves ASIC.

Thanks, Ted

bchetwynd commented 2 years ago

As noted in #13, I expected it to be in ~1 month. We are in the process of standing up an FPGA version of the Chipyard-CEP, which is essential to the open source release.

arlted commented 2 years ago

Thank you. Will the Chipyard-CEP have an ASIC version too?

Regards, Ted

From: Brendon Chetwynd @.> Sent: Monday, June 6, 2022 6:56 AM To: mit-ll/CEP @.> Cc: Nigussie, Theodros B CIV USARMY DEVCOM ARL (USA) @.>; Author @.> Subject: [URL Verdict: Neutral][Non-DoD Source] Re: [mit-ll/CEP] Status of CEP migration (Issue #14)

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As noted in #13 < Caution-https://github.com/mit-ll/CEP/issues/13 > , I expected it to be in ~1 month. We are in the process of standing up an FPGA version of the Chipyard-CEP, which is essential to the open source release.

— Reply to this email directly, view it on GitHub < Caution-https://github.com/mit-ll/CEP/issues/14#issuecomment-1147320701 > , or unsubscribe < Caution-https://github.com/notifications/unsubscribe-auth/AZFXTR2PZR5AC6TECMIEIATVNXKPDANCNFSM5XLHQ2KQ > . You are receiving this because you authored the thread.Message ID: @.***>

bchetwynd commented 2 years ago

Ted,

I think you'll need to clarify your question. In the case of the FPGA target, we'll be releasing a build on the Arty A7-100T, with a goal of releasing a more capable version on the VCU118 in the future.

On the ASIC front, any libraries/IP need to be licensed... as was the case with our recent tapeout. We have a long-term goal of releasing a licensed unencumbered ASIC version, but that is a while out.

arlted commented 2 years ago

Sorry, my question was not clear. I meant to ask about the "licensed unencumbered ASIC version" and you have answered it.

Thank you.

From: Brendon Chetwynd @.> Sent: Monday, June 6, 2022 8:27 AM To: mit-ll/CEP @.> Cc: Nigussie, Theodros B CIV USARMY DEVCOM ARL (USA) @.>; Author @.> Subject: [URL Verdict: Unknown][Non-DoD Source] Re: [mit-ll/CEP] Status of CEP migration (Issue #14)

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Ted,

I think you'll need to clarify your question. In the case of the FPGA target, we'll be releasing a build on the Arty A7-100T, with a goal of releasing a more capable version on the VCU118 in the future.

On the ASIC front, any libraries/IP need to be licensed... as was the case with our recent tapeout. We have a long-term goal of releasin a licensed unencumbered ASIC version, but that is a while out.

— Reply to this email directly, view it on GitHub < Caution-https://github.com/mit-ll/CEP/issues/14#issuecomment-1147393327 > , or unsubscribe < Caution-https://github.com/notifications/unsubscribe-auth/AZFXTRZ6Q5JT3HZ55KSKS6DVNXVEXANCNFSM5XLHQ2KQ > . You are receiving this because you authored the thread.Message ID: @.***>