Closed pratapsingh1729 closed 2 years ago
The two cases where our model-checker previously disagreed with herd
and rmem
have now been resolved---we had been calling Alloy with the wrong fence specification, but this is now fixed. I believe this PR should be ready to merge, at least for 2-thread test support. Let me know if you'd like me to change anything in the API or anywhere else!
This PR adds support for running RISC-V litmus tests through the HMC model-checking backend. Currently, only tests with two threads and postconditions of the form "exists (X /\ Y /\ ... /\ Z)" are supported, and it is known to work with all of the BASIC_2_THREAD tests. To run a test, execute the following:
The BASIC_2_THREAD tests have been added to the directory test/litmus/. This will call my simple compiler (implemented in LitmusToRiscv.hs) to translate the litmus specification into a RISC-V assembly file and extract the condition to check, then use
riscv-none-embed-gcc
to compile the assembly file into an ELF file, then run the HMC interpreter over that ELF file. For every valid full execution of a file, it will check whether all of the conditions specified in the litmus file postcondition are met; if so, it will print the alloy file generated by that execution for manual inspection. I also added a script run_riscv_mm_litmus.sh to run all the tests and store their output in log files.The following table summarizes performance and results:
Performance is currently limited by the use of SAT4J in the alloy solver, the time taken to start up the JVM for each separate alloy run (can be dozens of alloy runs per litmus test), and the fact that I increased the alloy search depth to 20. One can imagine ways to improve all of these.
The third column indicates whether HMC found an execution satisfying the litmus test postcondition; the fourth column indicates whether the
rmem
(operational) andherd
(axiomatic) models find an execution satisfying the litmus test postcondition (generated by manual inspection of the test log files).I am investigating the two cases where we disagree with theEDIT: we were calling Alloy with the wrong kind ofrmem
andherd
models---I believe there may be an issue in the riscv.als alloy file we are using to specify the RISC-V memory model, but further debugging is required. (EDIT: see https://github.com/daniellustig/riscv-memory-model/issues/1.)fence
specification, which I have now fixed. We now match the expected model behavior on all test cases.