pin 6 not part of XBAR INOUT

[manitou48]

in ENC1_test_xbar1.ino I don't think Teensy 4 pin 6 has an XBAR INOUT mapping. IN14 is associated with pin 8

define CORE_XIO_PIN0 IOMUXC_XBAR1_IN17_SELECT_INPUT //ALT1

define CORE_XIO_PIN1 IOMUXC_XBAR1_IN16_SELECT_INPUT //ALT1

define CORE_XIO_PIN2 IOMUXC_XBAR1_IN06_SELECT_INPUT //ALT3

define CORE_XIO_PIN3 IOMUXC_XBAR1_IN07_SELECT_INPUT //ALT3

define CORE_XIO_PIN4 IOMUXC_XBAR1_IN08_SELECT_INPUT //ALT3

define CORE_XIO_PIN5 IOMUXC_XBAR1_IN17_SELECT_INPUT //ALT3

define CORE_XIO_PIN7 IOMUXC_XBAR1_IN15_SELECT_INPUT //ALT1

define CORE_XIO_PIN8 IOMUXC_XBAR1_IN14_SELECT_INPUT //ALT1

define CORE_XIO_PIN30 IOMUXC_XBAR1_IN23_SELECT_INPUT //ALT1,0

define CORE_XIO_PIN31 IOMUXC_XBAR1_IN22_SELECT_INPUT //ALT1,0

define CORE_XIO_PIN33 IOMUXC_XBAR1_IN09_SELECT_INPUT //ALT3,0

define CORE_XIO_PIN36 IOMUXC_XBAR1_IN16_SELECT_INPUT

define CORE_XIO_PIN37 IOMUXC_XBAR1_IN17_SELECT_INPUT

./hardware/teensy/avr/libraries/QuadEncoder/QuadEncoder.h

[mjs513]

Morning @manitou48 Believe it does - check Rev2 of the RM it shows: ALT3 — Select mux mode: ALT3 mux port: XBAR1_INOUT17 of instance: xbar1 and page 908 which shows it on xbar1_in17.

Hope I am reading this right :)

[manitou48]

in17 ALT3 in manual shows as pin EMC_08 (which is pin 5, yes?) pin 6 is B0_10, yes?

from your ENC1_test_xbar1.ino

define CORE_XIO_PIN0 IOMUXC_XBAR1_IN17_SELECT_INPUT

define CORE_XIO_PIN1 IOMUXC_XBAR1_IN16_SELECT_INPUT

define CORE_XIO_PIN2 IOMUXC_XBAR1_IN06_SELECT_INPUT

define CORE_XIO_PIN3 IOMUXC_XBAR1_IN07_SELECT_INPUT

define CORE_XIO_PIN4 IOMUXC_XBAR1_IN08_SELECT_INPUT

define CORE_XIO_PIN5 IOMUXC_XBAR1_IN09_SELECT_INPUT

define CORE_XIO_PIN6 IOMUXC_XBAR1_IN15_SELECT_INPUT

define CORE_XIO_PIN7 IOMUXC_XBAR1_IN14_SELECT_INPUT

pin 7 should be IN15 pin 8 should be IN14

[mjs513]

oops you are right pin 4 is EMC_06. Sorry - thats what I get for answering while still on my first cup of coffee :) Pretty much been using @KurtE's spreadsheet: https://view.officeapps.live.com/op/view.aspx?src=https%3A%2F%2Fraw.githubusercontent.com%2FKurtE%2FTeensyDocuments%2Fmaster%2FTeensy4x%2520Pins.xlsx&wdOrigin=BROWSELINK and transposed lines for Pin.

But if you look at EMC_06 its the one IO-8, page 401 `ALT3 — Select mux mode: ALT3 mux port: XBAR_INOUT08 of instance: xbar1 and on page 908 for daisy

Instance: xbar1, In Pin: xbar_in8
0 GPIO_EMC_06_ALT3 — Selecting Pad: GPIO_EMC_06 for Mode: ALT3

so pretty sure pin 4 is correct.

Ok so now for pins 6, 7 and 8

Yep you are correct. Take a look at the QuadEncoder library: https://github.com/mjs513/Teensy-4.x-Quad-Encoder-Library/blob/b248234054b4354471ffa13d0c016a2cb90ec21c/QuadEncoder.h#L60 there looks like I corrected all the defines:

#define CORE_XIO_PIN0 IOMUXC_XBAR1_IN17_SELECT_INPUT    //ALT1
#define CORE_XIO_PIN1 IOMUXC_XBAR1_IN16_SELECT_INPUT    // SD_B0_02 ALT1
#define CORE_XIO_PIN2 IOMUXC_XBAR1_IN06_SELECT_INPUT    // EMC_04, ALT3
#define CORE_XIO_PIN3 IOMUXC_XBAR1_IN07_SELECT_INPUT    //ALT3
#define CORE_XIO_PIN4 IOMUXC_XBAR1_IN08_SELECT_INPUT    //ALT3
#define CORE_XIO_PIN5 IOMUXC_XBAR1_IN17_SELECT_INPUT    //ALT3
#define CORE_XIO_PIN7 IOMUXC_XBAR1_IN15_SELECT_INPUT    //ALT1
#define CORE_XIO_PIN8 IOMUXC_XBAR1_IN14_SELECT_INPUT    //ALT1
#define CORE_XIO_PIN30 IOMUXC_XBAR1_IN23_SELECT_INPUT   //ALT1,0
#define CORE_XIO_PIN31 IOMUXC_XBAR1_IN22_SELECT_INPUT   //EMC_36, ALT1,0
#define CORE_XIO_PIN33 IOMUXC_XBAR1_IN09_SELECT_INPUT   //ALT3,0

#if defined(ARDUINO_TEENSY41)
#define CORE_XIO_PIN36 IOMUXC_XBAR1_IN16_SELECT_INPUT // SD_B1_02, ALT1
#define CORE_XIO_PIN37 IOMUXC_XBAR1_IN17_SELECT_INPUT // SC_B1_03, ALT1
#endif

#if defined(ARDUINO_TEENSY_MICROMOD)    
#define CORE_XIO_PIN36 IOMUXC_XBAR1_IN05_SELECT_INPUT // SD_B0_01, ALT3
#define CORE_XIO_PIN37 IOMUXC_XBAR1_IN04_SELECT_INPUT // SD_B0_00, ALT3
#endif

Probably should update the defines here just in case. This was kind of my experimental test before converting to the actual encoder library. Several things would have to be updated in it in line with the actual Library.