"To ensure proper operation in the event of interruptions, the two instructions which follow a MFHI instruction may not be any of the instructions which modify the HI register: MULT, MULTU, DIV, DIVU, MTHI."
I have taken the liberty of adding all of these instructions to the keepout section after mflo and mfhi instructions. I also used Python's any keyword to make the line neater.
I removed mthi from the set because the SOTN decomp does not use that instruction, and because mthi and mtlo would require us to separate some of the logic for handling mflo versus mfhi, rather than the combined approach that is currently used. Therefore, ultimately, all this PR does is add the unsigned versions of mult and div to the keepout-zone.
I have confirmed that, with this change in place, the sotn-decomp project compiles successfully, so this should not introduce any regressions.
Fixes #14.
As per the CPU manual, https://cgi.cse.unsw.edu.au/~cs3231/doc/R3000.pdf, page 258 or A-46, the MFHI instruction says
I have taken the liberty of adding all of these instructions to the keepout section after
mflo
andmfhi
instructions. I also used Python'sany
keyword to make the line neater.I removed
mthi
from the set because the SOTN decomp does not use that instruction, and becausemthi
andmtlo
would require us to separate some of the logic for handlingmflo
versusmfhi
, rather than the combined approach that is currently used. Therefore, ultimately, all this PR does is add the unsigned versions ofmult
anddiv
to the keepout-zone.I have confirmed that, with this change in place, the sotn-decomp project compiles successfully, so this should not introduce any regressions.