[Feature Request] Add basic atomic instructions: `atomic_load`, `atomic_store`, `fence`

[dmitry-salin]

Review Mojo's priorities

• [X] I have read the roadmap and priorities and I believe this request falls within the priorities.

What is your request?

There is already __mlir_op.pop.load[alignment](address), but it only has alignment attribute. We need ordering ::mlir::LLVM::AtomicOrderingAttr and possibly other additional attributes - https://mlir.llvm.org/docs/Dialects/LLVM/#attributes-31 The same applies to __mlir_op.pop.store[alignment](value, address). The fence is currently missing - https://mlir.llvm.org/docs/Dialects/LLVM/#llvmfence-llvmfenceop

What is your motivation for this change?

Mojo, as a systems programming language, requires basic atomic instructions.

Any other details?

No response

[jon-chuang]

@dmitry-salin do these intrinsics compose with nvvm synchronization primitives or are they only for CPU?

Seems like nvvm does not support atomic load/store https://docs.nvidia.com/cuda/nvvm-ir-spec/#atomic-memory-ordering-constraints

Still, this would be very useful for implementing CPU locking/async/concurrent primitives

[dmitry-salin]

@dmitry-salin do these intrinsics compose with nvvm synchronization primitives or are they only for CPU?

Seems like nvvm does not support atomic load/store https://docs.nvidia.com/cuda/nvvm-ir-spec/#atomic-memory-ordering-constraints

Still, this would be very useful for implementing CPU locking/async/concurrent primitives

I don't know much about nvvm, but it looks like MLIR's LLVM dialect is CPU-only.