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mohaghasemzadeh / ReBNet

Residual Binarized Neural Network
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Failed to rebuild MNIST from ReBNet repository (Not enough resources for implementation) #4

Open behnamrazi opened 4 years ago

behnamrazi commented 4 years ago

Dear Mr. Ghasemzadeh,

currently I am working on a project about AI implementation on FPGAs. Within my researches I read your paper ,ReBNet: Residual Binarized Neural Network, and found it as a promising solution. I cloned ReBNet repository and tried to rebuild MNIST network. As I understood, I do not need to train the network before rebuilding it. The HLS synthesis works and produces results/report. But unfortunately implementation of Vivado project fails due to lack of resources on target device (PYNQ). In attached file you can see the report of HLS synthesis.

As you can see the DSP48E utilization is above 100% (145%). So, I do not know what went wrong! That would be great if you could help me to solve this issue, because I would like to generate the bitstream of your design.

Thank you in advance for considering my issue.

Regards, Behnam

hls.txt

mohaghasemzadeh commented 4 years ago

Hi Behnam,

Thanks for checking out my work. Please take a look at Table 2 which mentions what platform was used for each task. As you can see, for MNIST, we used Spartan XC7S50. You shouldn't have any problems with this device. Let me know if you have any questions.

Regards, Mohammad Ghasemzadeh

On Thu, Jun 18, 2020 at 7:17 AM Behnam Razi Perjikolaei < notifications@github.com> wrote:

Dear Mr. Ghasemzadeh,

currently I am working on a project about AI implementation on FPGAs. Within my researches I read your paper ,ReBNet: Residual Binarized Neural Network, and found it as a promising solution. I cloned ReBNet repository and tried to rebuild MNIST network. As I understood, I do not need to train the network before rebuilding it. The HLS synthesis works and produces results/report. But unfortunately implementation of Vivado project fails due to lack of resources on target device (PYNQ). In attached file you can see the report of HLS synthesis.

As you can see the DSP48E utilization is above 100% (145%). So, I do not know what went wrong! That would be great if you could help me to solve this issue, because I would like to generate the bitstream of your design.

Thank you in advance for considering my issue.

Regards, Behnam hls.txt https://github.com/mohaghasemzadeh/ReBNet/files/4799104/hls.txt

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behnamrazi commented 4 years ago

Dear Mohammad,

thank you so much for your fast reply. Spartan XC7S50 has less resources than PYNQ board. By the way, I set the config_proj_part in hls-syn.tcl to "xc7s50csga324-1" and ran the ./make-hw.sh for MNIST synthesis (h) to make ip-block and make the vivado project by myself. Here is the hls-result:

+-----------------+---------+-------+-------+-------+-----+ | Name | BRAM_18K| DSP48E| FF | LUT | URAM| +-----------------+---------+-------+-------+-------+-----+ |DSP | -| -| -| -| -| |Expression | -| -| 0| 6| -| |FIFO | -| -| -| -| -| |Instance | 18| 322| 57042| 43996| 0| |Memory | 96| -| 7680| 640| 0| |Multiplexer | -| -| -| 9432| -| |Register | -| -| 578| -| -| +-----------------+---------+-------+-------+-------+-----+ |Total | 114| 322| 65300| 54074| 0| +-----------------+---------+-------+-------+-------+-----+ |Available | 150| 120| 65200| 32600| 0| +-----------------+---------+-------+-------+-------+-----+ |Utilization (%) | 76| 268| 100| 165| 0| +-----------------+---------+-------+-------+-------+-----+

As you can see, utilization of LUT and DSP48E are over 100%. Therefore, the implementation and generating bitstream of MNIST is not possible for Spartan XC7S50. Did I do something wrong? Should I also change another parameter?

Regards, Behnam