mortbopet / Ripes

A graphical processor simulator and assembly editor for the RISC-V ISA
https://ripes.me/
MIT License
2.57k stars 274 forks source link

Add a pseudoinstructions test suite #184

Open mortbopet opened 2 years ago

mortbopet commented 2 years ago

Just as we have a self-checking test suite for RV32/64IMC, it would be nice to also have a full pseudoinstruction test suite to ensure corectness.

plaidbait91 commented 1 year ago

Hey @mortbopet I'm interested in contributing to this. I found a list of pseudo-instructions here: https://github.com/riscv-non-isa/riscv-asm-manual/blob/master/riscv-asm.md#-a-listing-of-standard-risc-v-pseudoinstructions

Should I use this as reference to develop the pseudo-instruction suite?

mortbopet commented 1 year ago

That would be a decent reference! Not all of them are implemented, however, so the list of instructions to cover is probably more easily found by searching for things like this.