For those who want the fastest possible simulation, and do not care about any form of datapath visualization, there should be an option to select an ISA simulator processor model.
This processor model, while complying with the ProcessorInterface, will in VSRTL be implemented as a "black box" - in other words, pure C++ logic.
For those who want the fastest possible simulation, and do not care about any form of datapath visualization, there should be an option to select an ISA simulator processor model.
This processor model, while complying with the ProcessorInterface, will in VSRTL be implemented as a "black box" - in other words, pure C++ logic.