There seems a bug in src/processors/RISC-V/rv-registerfile.h

mortbopet / Ripes

A graphical processor simulator and assembly editor for the RISC-V ISA

https://ripes.me/

MIT License

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There seems a bug in src/processors/RISC-V/rv-registerfile.h #232

Open AmbitionXiang opened 2 years ago

AmbitionXiang commented 2 years ago

As said in external/VSRTL/core/vsrtl_wire.h, "all ports used in the wire's propagation function must be added to its sensitivity list". However, in src/processors/RISC-V/rv-registerfile.h, wr_addr was not added to the sensitive list of wr_en_0.

mortbopet commented 2 years ago

Do you have an assembly program which isolates this issue?

AmbitionXiang commented 2 years ago

Not yet. I was just confused when reading the code.