Create logic gate unit test

mortbopet / VSRTL

Visual Simulation of Register Transfer Logic

MIT License

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Create logic gate unit test #31

Open mortbopet opened 5 years ago

mortbopet commented 5 years ago

Unit test(s) should be added to assure the functionality of the vsrtl::core logic gates. Unit test should involve both logic gates of width 1 (boolean), as well as logic gates with wider inputs.