search

mortbopet / VSRTL

Visual Simulation of Register Transfer Logic
MIT License
87 stars 17 forks source link

Active path for MIPS Processors #57

Closed SteliosKaragiorgis closed 1 year ago

mortbopet commented 1 year ago

Is this ready for review? I'm asking since there seems to be commented out code, lack of formatting (I haven't set up a CI gate here, but it should comply with https://github.com/mortbopet/VSRTL/blob/master/.clang-format), and duplicate variables.

SteliosKaragiorgis commented 1 year ago

This vsrtl code is needed for the Ripes code to working. The duplicate variables and commented out code is not needed. I thought I removed the commented out code.

Me and my colleagues prepare the code on Ripes so we will upload it soon

On Fri, 9 Jun 2023, 10:51 Morten Borup Petersen, @.***> wrote:

Is this ready for review? I'm asking since there seems to be commented out code, lack of formatting (I haven't set up a CI gate here, but it should comply with https://github.com/mortbopet/VSRTL/blob/master/.clang-format), and duplicate variables.

— Reply to this email directly, view it on GitHub https://github.com/mortbopet/VSRTL/pull/57#issuecomment-1584131070, or unsubscribe https://github.com/notifications/unsubscribe-auth/AZ7TEBNOFN2Z6FAPTKSVKJLXKLIYXANCNFSM6AAAAAAY67MP7M . You are receiving this because you authored the thread.Message ID: @.***>

SteliosKaragiorgis commented 1 year ago

Hello. Do I need to delete these PRs and uploade them again? I mean compatible with qt6 and without comments