Closed tgiphil closed 8 months ago
New Output:
Mosa.UnitTests.Optimization.Division::DivisionBy3(System.UInt32):System.UInt32 [v2] @ 0 after stage [49] GraphVizStage:
Block #0 - Label L_10000 [Header]
Prev:
10000: X86.Push32 EBP
10000: X86.Mov32 EBP <= ESP
10000: IR.Flow L_00000
Next: L_00000
Block #1 - Label L_00000
Prev: L_10000
00001: X86.MovLoad32 EAX <= EBP, 8 (p0)
00003: X86.Mov32 ECX <= 2863311531
00003: X86.Mul32 EDX, EAX <= EAX, ECX
00003: IR.Nop
00003: X86.Mov32 EAX <= EDX
00003: X86.Shr32 EAX <= EAX, 1
00008: IR.Flow L_FFFFF
Next: L_FFFFF
Block #2 - Label L_FFFFF
Prev: L_00000
FFFFF: IR.Nop
FFFFF: X86.Pop32 EBP [I4]
FFFFF: X86.Ret
Next:
The live ranges generation used by the register allocator for physical registers overlap by a half "slot" causing sub-optimal code generation.
Example:
The allocator should allocate EAX instead of ECX at the end: