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mossprescott / pynand

Nand2Tetris in Python.
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Implement MemorySystem with one-cycle latency #35

Open mossprescott opened 2 years ago

mossprescott commented 2 years ago

Fixes #34.

NB: Turns out the blast radius is pretty large. Making the system more "realistic" by adding this complexity is interesting when you want to experiment with alternative designs (see the risc branch), but seems to be at odds with the goal of keeping the course approachable. Maybe don't merge this; instead, rip out all the "advanced" stuff to a separate repo, possibly sharing the basic simulation infrastructure.

Not only reads but also writes had to be modified to use the address which was applied to the memory on the previous cycle, so that the standard CPUs single-cycle read/write can still work (e.g. M=M-1).

Effectively you have to think about "pipelining" the address even in the standard CPU, which is more than most hypothetical solvers will probably want to deal with.

It also means some modification to the tests which were imported directly from the original course materials:

The tests for user-constructed "RAM"s now tolerate this sequence, but don't actually require it.

The tests for CPUs unfortunately now require the new behavior, and they're significantly harder to follow as a result.

This also makes it painfully clear how badly the codegen simulator is in need of refactoring.

mossprescott commented 2 years ago

Also, all the alternative CPUs are currently broken on this branch, and their get counts will increase in a similar way when they're fixed.