Device tree definition for sun7i/A20?

[hor63]

I am building with Linux V4.15-RC1. According to Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt I have to provide a bus clock as well as a Mali core clock. The core clock seems to be CLK_GPU (=165) but I am at a total loss for the bus clock. In the example the clocks are listed as: clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; but CLK_BUS_GPU is nowhere to be found.

Does anyone have a working example of the DTS for a sun7i/A20?

Thanks, Kai

[hor63]

Never mind. Found an example in https://github.com/net147/linux/blob/sun7i-drm-wip/arch/arm/boot/dts/sun7i-a20.dtsi the driver now loads Google is always your friend. And many thanks, Jonathan Liu for blazing the trail.

Thanks, Kai

[sergey-suloev]

@hor63 hi can you explain what those numbers 69, 70... mean ?

interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;

Are they SoC specific ? I have the following for H3:

interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;

It would be nice to understand the meaning.

[giuliobenetti]

Hi @sergey-suloev

those are the interrupt irq numbers. They are Soc specific. You can check them on H3 User Manual against A20 one.

[sergey-suloev]

@giuliobenetti wow nice I got wrong interrupts

Those below are from document:

129 GPU-GP 130 GPU-GPMMU 131 GPU-PP0 132 GPU-PPMMU0 133 GPU-PMU 134 GPU-PP1
135 GPU-PPMMU1

According to datasheet numbers 97-103 are occupied for other hardware pieces.

[giuliobenetti]

@sergey-suloev pay attention that respect the GIC table you have to subtract 32. 10 days ago I've checked if they were ok, and they seemed to be. Anyway double check them

[giuliobenetti]

@sergey-suloev page 211 of H3 user manual:

129 GPU-GP 130 GPU-GPMMU 131 GPU-PP0 132 GPU-PPMMU0 133 GPU-PMU 134 GPU-PP1 135 GPU-PPMMU1

But subtract 32 that are core irqs, and they are handled as -1, -2 etc. So 0 is 32(UART 0). They are right previous way.

[sergey-suloev]

@giuliobenetti ok, got it looks correct

another thing that I see is the display pool (cma) declaration is a bit different

https://github.com/net147/linux/blob/sun7i-drm-wip/arch/arm/boot/dts/sun7i-a20.dtsi#L238

and below is mine

   reserved-memory {
           #address-cells = <1>;
           #size-cells = <1>;
           ranges;

           cma: linux,cma {
                   compatible = "shared-dma-pool";
                   reusable;
                   size = <0x10000000>;
                   alignment = <0x2000>;
                   linux,cma-default;
           };
   };

They are missing a couple of properties. Not sure is they are important.

[giuliobenetti]

@sergey-suloev I would say yours is better for alignment field. For the rest I don't know.

What I don't like is to put this cma in dtsi. It should be board specific. But this is another story.

[sergey-suloev]

@giuliobenetti I wouldn't say it is board-specific, it is more like soc-specific, in general... And in board-specific dts files you can tweak the tree. That's how I see it.

[giuliobenetti]

@sergey-suloev but deciding prior the size of cma isn't a good idea for me. Because sometimes you need only 32M of cma because you screen is little, sometimes you need 128M because you have a full-hd hdmi display.

[sergey-suloev]

@giuliobenetti yes, this is board-specific thing, for sure. can use overlays for that

[hor63]

@sergey-suloev Not sure if your linux,cma pool is right. A pool with the property "linux,cma-default" is used by default for all kinds of large continuous allocations. Please see https://www.kernel.org/doc/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt: Linux implementation note:

• If a "linux,cma-default" property is present, then Linux will use the region for the default pool of the contiguous memory allocator.

• If a "linux,dma-default" property is present, then Linux will use the region for the default pool of the consistent DMA allocator.

Maybe it is better to use a distinct name like @net147 did in his declaration which is truely private to the display engine and the Mali GPU.

[hor63]

Please note that this shared buffer thingy is a specialty of the framebuffer-based Mali blob.

The X-based Mali blob does not require it.

Therefore this is not even board specific but actually application and use-case specific, whether you are running a full-screen EGL-based OpenGl ES application on the device or a GLX(?) application out of an X window.

Cheers, Kai

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From: orpaltech notifications@github.com Sent: Tuesday, December 5, 2017 11:20 AM To: mripard/sunxi-mali Cc: Kai Horstmann; Mention Subject: Re: [mripard/sunxi-mali] Device tree definition for sun7i/A20? (#17)

@giuliobenettihttps://github.com/giuliobenetti I wouldn't say it is board-specific, it is more like soc-specific, in general... And in board-specific dts files you can tweak the tree. That's how I see it.

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[sergey-suloev]

@hor63 makes sense... I 'll try to remove "linux,cma-default" and let know what happens

[hor63]

I would leave this section in the memory definition, but add another one named "display-pool" or so, and let the display-engine and mali nodes refer to "display-pool".

---

From: orpaltech notifications@github.com Sent: Tuesday, December 5, 2017 2:33 PM To: mripard/sunxi-mali Cc: Kai Horstmann; Mention Subject: Re: [mripard/sunxi-mali] Device tree definition for sun7i/A20? (#17)

@hor63https://github.com/hor63 makes sense... I 'll try to remove "linux,cma-default" and let know what happens

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[giuliobenetti]

@sergey-suloev @hor63 Attached is my board dts, using cma and mali in this way, make it possible to configure cma size on board.

board-micronova-sun7i-a20-q027_2_f.dts.txt

[mripard]

If you don't set the linux,cma-default property, the memory will be forever reserved, even if you're not using it. That property tells linux that it can use that section for temporary allocations that can easily be flushed out (think file system cache) if you don't use it.

@hor63 the very best thing would be to contribute it so that you don't have to google it.

[sergey-suloev]

@mripard thanks That means the property can't be a reason why mali is not working on my device