Closed Yushiao closed 7 years ago
First of all, thank you for sending me your great PR.
I have a few comments below.
inout
is also port. (https://www.hdlworks.com/hdl_corner/verilog_ref/items/PortDeclaration.htm)int
but also byte
, long
, etc... (https://www.doulos.com/knowhow/sysverilog/tutorial/datatypes/)Hi,
I update the supported datatypes for byte
, long
, etc...
But typedef
, struct
, and enum
are not working now
Looks good to me! Cheers! 🍻
Hello
I made a feature that show the line where the variable declare when mouse hover to the variable
like pictures below
If there are any problems, let me know